Communications systems are being developed that are capable of handling several hundred or more gigabits per second (GB/s) of bandwidth. At these speeds, signal transmission over long transmission channels are subject to serious problems. Losses, such as skin effect, dielectric loss, and connector loss become significant at these frequencies. Higher frequency components of the signal are more adversely affected than lower frequency components due to the low pass nature of the transmission channel.
All wired channel or optical channel applications present a more difficult problem in that the input signal has a large bandwidth. With a large bandwidth signal, there are varying degrees of signal degradation that are signal dependent. FIG. 1 is a graph illustrating a typical 8B10B encoded input signal 100, which has a very large bandwidth, from 1 MHz to 4 GHz. The 8B10B signal 100 is transmitted through a medium (transmission channel) to a data receiver. The transmission channel can include elements such as a printed circuit board trace, a connector or the space inside an optical fiber. FIG. 2 is a graph illustrating a conventional transfer function 200 for the transmission channel used to transmit the 8B10B signal 100. As mentioned above, the transfer function 200 of this transmission channel exhibits a low pass characteristic.
In order to operate at frequencies up to 10 GB/s, a data receiver must be able to tolerate an input signal (e.g., 8B10B signal 100) that has been degraded by the associated transmission channel (see, e.g., transfer function 200). The low pass transfer function of the transmission channel undesirably attenuates high frequency signals. Without compensation, this low pass transfer function degrades not only the high frequency amplitudes, but also introduces a form of signal dependent jitter commonly referred to as inter-symbol interference.
FIG. 3 is an eye diagram 300 that illustrates the level of inter-symbol interference in a signal received on a typical transmission channel. Eye diagram 300 illustrates the effects of inter-symbol interference and other transmission channel impairments in digital transmission. Eye diagram 300 is constructed by plotting the amplitude of a random data signal against time on a fixed interval (unit) axis. Upon reaching the end of the fixed interval (e.g., 100 picoseconds for a 10 GB/s system), the amplitude of the fixed signal wraps around to the beginning of the fixed interval (0 picoseconds). Thus, eye diagram 300 consists of many overlapping curves. The center region 301 of eye diagram 300, which is referred to as the “eye”, exhibits a length L1 and a width W1. It is desirable for the eye to have a relatively large length L1 and width W1, such that the data symbols can be readily distinguished from one another. However, center region 301 exhibits a relatively small length L1 and width W1, thereby indicating that the transmission of data on the transmission channel is prone to errors due to noise and timing drift. A small length L1 and width W1 makes signal reception and recovery difficult for the associated data receiver, which usually results in a high bit error rate (BER). High bit error rate causes packet loss, and thus reduces the effective bandwidth. It would therefore be desirable to have a data receiver that is capable of receiving the data signal represented by eye diagram 300, and in response, provide an output signal having an eye diagram with a relatively wide “eye”.
FIG. 4 is a circuit diagram of a conventional data receiver 400, which includes input pads 401-402, electrostatic discharge (ESD) protection circuit 403, and differential amplifier 404. A differential input signal is provided to input pads 401-402 via a transmission channel 410. This differential input signal is routed through ESD protection circuit 403 to differential amplifier 404. In response, differential amplifier 404 provides a differential output signal to an associated core circuit (not shown).
ESD protection circuit 403 includes diodes 411-416, which are connected between the VDD and VSS voltage supply terminals as illustrated, and resistors 421 and 422, which are connected in series between input pads 401-402, respectively, and input terminals of differential amplifier 404, respectively. ESD protection circuit 403 protects differential amplifier 404 and the associated core circuit from ESD events occurring on pads 401 and/or 402.
Resistors 421 and 422 are necessary because the input terminals of differential amplifier 404 are directly connected to the gates of transistors of a differential pair within differential amplifier 404. Thus, resistors 421 and 422 provide protection to these transistors when a charge device model (CDM) ESD event occurs on pads 401 and/or 402. These series resistors 421-422 undesirably add a pole to the transfer function of data receiver 400. These series resistors 421-422 also undesirably attenuate the high frequency transfer function of data receiver 400, thereby exacerbating the low pass function of transmission channel 410. It would therefore be desirable to have a data receiver that does not require resistors connected in series between the pads and the amplifier.